Infineon launches new generation of dual-channel isolated gate driver ICs to boost system performance in SMPS designs
【Lansheng Technology Information】In order to meet the latest design and application requirements, Infineon Technologies launched a new generation of dual-channel electrically isolated EiceDRIVER™ gate driver IC product series.
Compared with the previous generation of products, Infineon's new generation of EiceDRIVER introduces DSO 14-pin package, which can increase the creepage distance between channels; at the same time, the built-in dead time control and breakdown protection function can also shorten the UVLO startup time . The new generation of EiceDRIVER adopts a powerful isolation technology that complies with the industry's latest device-level isolation standards (VDE 0884-11, IEC 60747-17). In addition, the drivers are packaged in a highly compact LGA 4x4 mm2 package, which can save up to 36% space in low-voltage applications. One of the important improvements and upgrades that developers have made to the new generation of EiceDRIVER is the integration of galvanic isolation technology in the gate driver IC, which is now certified according to IEC 60747-17. IEC 60747-17 certification means that these products have a service life of up to 20 years and meet the highest safety standards.
Shorter UVLO startup time (from 5μs to 2μs) speeds up SMPS startup and avoids saturation of the main power transformer. In addition, the new generation IC has a special output clamping circuit, which realizes the active output clamping function, which can quickly suppress the output noise even when the channel is "not working". This versatile approach prevents dangerous half-bridge shoot-through events during bootstrap start-up while the gate driver supply is still below the UVLO turn-on threshold.
Infineon's new generation of gate driver ICs has built-in configurable shoot-through protection (STP) and dead-time control (DTC) in hardware. These two functions serve as a second level of safety mechanism, providing further protection to ensure safe and reliable operation of the gate driver IC. In addition, the innovative package design removes unused or previously called "no-connect" pins, improving the isolation level between channels and the flexibility of PCB layout, thereby reducing the difficulty for designers to develop circuits.
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